Apparatus and methods for reducing interference in radio-frequency apparatus

ABSTRACT

A converter in a radio-frequency (RF) apparatus includes a feedback circuitry. The feedback circuitry has a shielded input and a shielded output. The shielded input and the shielded output of the feedback circuitry tend to reduce interference in the converter.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present patent application is a continuation of, and incorporates byreference, U.S. patent application Ser. No. 10/624,456, filed on Jul.22, 2003, now abandoned, titled “Apparatus and Methods for ReducingInterference in Radio-Frequency Apparatus,” which claims priority to,and incorporates by reference, U.S. Provisional Patent Application Ser.No. 60/400,255, titled “Radio-Frequency Apparatus with Noise-ShapingConverter and Associated Methods,” filed on Jul. 31, 2002; and which isfurther a continuation-in-part of, and incorporates by reference, U.S.patent application Ser. No. 09/686,072, titled “Method and Apparatus forReducing Interference,” filed on Oct. 11, 2000 now abandoned.

TECHNICAL FIELD

This patent application relates generally to radio-frequency (RF)apparatus and, more particularly, to reducing interference in RFapparatus, such as RF apparatus that includes non-linear blocks orcircuitry, such as noise-shaping converters, modulators or multipliers,switched-capacitor networks or filters, and the like.

BACKGROUND

The design and architecture of RF apparatus, such as RF receivers andtransceivers, has been towards increasing integration. Increasingintegration tends to increase reliability, decrease footprint and cost,and provide more system-level versatility and flexibility.

The increasing integration, however, has also tended to make morechallenging some aspects of RF apparatus design. For example,integrating more functionality into a single device entails coping withnoise and interference problems. The noise and interference problems, ifleft untreated, may result in non-functioning or poorly functioningproducts that fail to meet their respective specifications. A need hastherefore arisen for managing and mitigating noise and interferenceproblems in integrated RF apparatus.

SUMMARY

This invention relates to reducing interference in RF apparatus andassociated circuitry. One aspect of the invention concerns apparatus forreducing interference. In one embodiment, a converter in an RF apparatusincludes a feedback circuit. The feedback circuit has a shielded inputand a shielded output. The shielded input and the shielded output tendto reduce interference in the converter.

Another aspect of the invention relates to methods of reducinginterference in RF apparatus and associated circuits. In anotherembodiment, a method of reducing interference in a non-linear circuit ina radio-frequency (RF) apparatus includes shielding an input of thenon-linear circuit. The method also includes shielding an output of thenon-linear circuit.

DESCRIPTION OF THE DRAWINGS

The appended drawings illustrate only exemplary embodiments of theinvention and therefore should not be considered as limiting its scope.The disclosed inventive concepts lend themselves to other equallyeffective embodiments. In the drawings, the same numeral designatorsused in more than one drawing denote the same, similar, or equivalentfunctionality, components, or blocks.

FIG. 1 shows a block diagram of a receive-path circuitry in an RFapparatus according to the invention.

FIG. 2 illustrates a block diagram of a noise-shaping converter used inexemplary embodiments according to the invention.

FIG. 3 depicts a block diagram of another noise-shaping converter usedin exemplary embodiments according to the invention.

FIG. 4 shows a circuit arrangement that models one interferencemechanism that result from integrating converters and RF circuitrytogether.

FIG. 5 illustrates waveforms associated with the down-converting ofoutput signal of a signal converter with a coupled RF signal.

FIG. 6 depicts waveforms associated with the aliasing of an RF signalcoupled to a converter circuit.

FIG. 7 shows a block diagram of a converter according to an exemplaryembodiment of the invention that includes interference reduction orelimination apparatus.

FIG. 8 illustrates a block diagram of a converter according to anotherexemplary embodiment of the invention that includes interferencereduction or elimination apparatus.

FIG. 9 depicts a circuit arrangement that models the interferencemechanism that results from RF signals coupling to a reference signalsource or circuit.

FIG. 10 shows waveforms associated with interference that results fromcoupling between an RF signal and a reference or clock generationcircuit.

FIG. 11 illustrates a block diagram of a circuit arrangement forgenerating clock signals according to an exemplary embodiment of theinvention.

FIG. 12 depicts a block diagram of a circuit arrangement for generatingclock signals according to another exemplary embodiment of theinvention.

FIG. 13 shows a schematic diagram illustrating a conductive strip usedto shield a signal line.

FIGS. 14-20 illustrate various embodiments of the conductive strip shownin FIG. 13.

DETAILED DESCRIPTION

This invention contemplates apparatus and methods for reducinginterference in RF apparatus that include non-linear circuitry orblocks, such as switched-capacitor networks or filters, noise-shapingconverters, analog-to-digital converters (ADCs), digital-to-analogconverters (DACs), multipliers or modulators, and the like, as personsof ordinary skill in the art who have the benefit of the description ofthe invention understand.

The inventive concepts provide methods and apparatus for eliminating orreducing interference in such RF apparatus. To do so, one may shieldinput signal(s) (including control signal(s), reference signal(s),ground line(s), and power supply line(s)), output signal(s) (includingstatus signal(s)), or both, of the non-linear circuit(s) or block(s).Furthermore, as an alternative to shielding (which may include usingconduits), or in addition to using shields, one may filter inputsignal(s) (including control signal(s), reference signal(s), groundline(s), and power supply line(s)), output signal(s) (including statussignal(s)), or both, of the non-linear block(s) or circuit(s).

As persons of ordinary skill in the art who have the benefit of thedescription of the invention understand, a shield may generallyencompass a conduit. For example, one type of shield (e.g., a groundplane fabricated above or below a region, circuit, or feature of an IC)may reduce interference caused by electric fields, whereas another typeof shield, a conduit, may reduce interference caused by magnetic fields.Thus, shields according to the invention include shields that primarilyreduce interference because of electric fields, shields (conduits) thatprimarily reduce interference because of magnetic fields by reducingcircuit loop areas, or both, and one may use one or both types ofshields, as desired.

The RF apparatus may generally constitute RF receivers, RF transmitters,or RF transceivers, such as cellular or mobile telephones. The RFapparatus may reside in an IC, module, multi-chip module (MCM), orpartition, as desired. The interfering mechanism may reside within theIC, module, partition, or MCM, or outside of it. By using the inventiveconcepts, one may overcome or reduce the interference that results fromintegrating noise-shaping converters with RF circuitry.

The inventive concepts apply effectively to cellular or mobiletelephones that meet or operate according to a variety of standards, aspersons skilled in the art who have the benefit of the description ofthe invention understand. For example, one may use the invention in RFapparatus for global system for mobile communications (GSM), generalpacket radio services (GPRS), enhanced GPRS (E-GPRS) or enhanced datafor GSM evolution (EDGE), code division multiple access (CDMA), widebandCDMA (W-CDMA), time division multiple access (TDMA).

Furthermore, one may apply the inventive concepts to a variety of RFapparatus architectures and circuit topologies, as persons of ordinaryskill in the art who have the benefit of the description of theinvention appreciate. Some examples include direct-conversion RFreceivers and intermediate-frequency (IF) RF receivers, including low-IFRF receivers. U.S. patent application Ser. No. 10/075,122, titled“Digital Architecture for Radio-Frequency Apparatus and AssociatedMethods,” and incorporated by reference here, describes several examplesof such receivers.

FIG. 1 shows a block diagram of a receive-path circuitry in an RFapparatus according to the invention. The receive-path circuitry resideswithin a circuit partition or block 100. As noted above, circuitpartition 100 may constitute an integrated circuit, partition, module,or MCM, as desired.

Circuit partition 100 includes RF circuitry 103, IF/baseband circuitry106, and signal processing circuitry 109. As noted above, generally,signal processing circuitry 109 may include a non-linear circuit orblock, such as switched-capacitor networks or filters, noise-shapingconverters, analog-to-digital converters (ADCs), digital-to-analogconverters (DACs), multipliers or modulators, and the like, as personsof ordinary skill in the art who have the benefit of the description ofthe invention understand.

RF circuitry 103 receives RF signals and processes those signals, forexample, by using low-noise amplifiers (LNA), and the like, as personsof ordinary skill in the art who have the benefit of the description ofthe invention understand. RF circuitry 103 provides processed RF signals112 to IF/baseband circuitry 106.

IF/baseband circuitry 106 generally constitutes a signal-processingcircuitry that further processes the output signals of RF circuitry 103(i.e., processed RF signals 112) to generate output signals 115. Outputsignals 115 may include in-phase and quadrature signals, as desired.

The nature of the signal processing that IF/baseband circuitry 106performs depends on the desired type and architecture of the RFapparatus within which circuit partition 100 resides. By way ofillustration, desired types of RF apparatus includeintermediate-frequency (IF) RF apparatus (including low-IF RF apparatus)and direct-conversion RF apparatus.

In an intermediate frequency (IF) type of RF apparatus, IF/basebandcircuitry 106 provides IF signal processing, as persons of ordinaryskill in the art who have the benefit of the description of theinvention understand. In this type of apparatus, IF/baseband circuitry106 constitutes an IF signal processing block or circuitry.

IF/baseband circuitry 106 may include IF down converters (and associatedfilters) to baseband, analog-to-digital conversion performed on thebaseband signal, analog-to-digital conversion performed on the IFsignal, or complex or real filtering, as desired. The operation ofIF/baseband circuitry 106 in such apparatus falls within the knowledgeof persons skilled in the art with the benefit of the description of theinvention.

In other types of RF apparatus, for example, a direct-conversionapparatus, one may generally omit IF/baseband circuitry 106, as personsskilled in the art with the benefit of the description of the inventionunderstand. In this type of apparatus, RF circuitry 103 may provide downconversion from RF to baseband, as desired.

Generally, IF/baseband circuitry 106 provides signals 115 (i.e.,processed signals) to signal processing circuitry 109. Signal processingcircuitry 109 further processes signals 115 to generate output signals118. Note that, depending on the type and architecture of the RFapparatus, input signals 115 and output signals 118 may include in-phaseand quadrature signals, as desired, and as persons of ordinary skill inthe art who have the benefit of the description of the inventionunderstand.

FIG. 2 illustrates a block diagram of a noise-shaping converter 109Aused in exemplary embodiments according to the invention. Noise-shapingconverter 109A in FIG. 2 may constitute a variety of converters orcircuitry, as desired. By way of illustration, it may include adelta-sigma converter, a delta modulator, a single-loop converter, amultiple-loop converter, multi-stage noise-shaping circuitry (MASH), aconverter with a single-bit feedback path or circuitry, a converter witha multi-bit feedback path or circuitry, as desired, and as persons ofordinary skill in the art who have the benefit of the description of theinvention understand.

Noise-shaping converter 109A includes subtracter 125, signal-processingcircuitry 128, quantizer 131, and feedback circuitry 134. Feedbackcircuitry 134 processes output signal of noise-shaping converter 109A.

Subtracter 125 subtracts feedback signal 146 from input signal 125 togenerate signal 137. Signal-processing circuitry 128 (with a transferfunction denoted as H(ω) or H(z)) processes output signal 137 ofsubtracter 125, and generates output signal 140. Generally,signal-processing circuitry 128 provides a relatively high loop gain inthe frequency band of interest so as to suppress quantization noise (forexample, integrators or resonators), as persons skilled in the art whohave the benefit of the description of the invention understand.

Quantizer 140 quantizes output signal 140 of signal-processing circuitry128, and generates output signal 143 of noise-shaping converter 109A.Feedback circuitry 134 processes output signal 143 to generate feedbacksignal 146. Feedback circuitry 134 uses a reference signal 149 (forexample, a current or voltage signal) to generate feedback signal 146,as persons of ordinary skill in the art who have the benefit of thedescription of the invention understand. Feedback circuitry 134 mayinclude discrete-time circuitry, as desired.

FIG. 3 depicts a block diagram of another noise-shaping converter 109Aused in exemplary embodiments according to the invention. Noise-shapingconverter 109A in FIG. 3 is similar to noise-shaping converter 109A inFIG. 2.

Referring to FIG. 3, noise-shaping converter 109A may constitute avariety of converters or circuitry, as desired, and as persons ofordinary skill in the art who have the benefit of the description of theinvention understand. Generally, noise-shaping converter may include thecircuitry and converters described above with respect to FIG. 2.

Noise-shaping converter 109A includes subtracter 125, signal-processingcircuitry 128, quantizer 131, and modulator or multiplier 150. Ratherthan a generalized feedback circuitry 134 (see FIG. 2), converter 109Ain FIG. 3 includes modulator 150. Modulator 150 operates on the outputsignal of noise-shaping converter 109A, as described below.

Similar to the embodiment in FIG. 2, subtracter 125 subtracts feedbacksignal 146 from input signal 125 to generate signal 137.Signal-processing circuitry 128 processes output signal 137 ofsubtracter 125, and generates output signal 140.

Quantizer 140 quantizes output signal 140 of signal-processing circuitry128, and generates output signal 143 of noise-shaping converter 109A.Modulator 150 processes output signal 143 to generate feedback signal146. More specifically, modulator 150 modulates (or mixes or multiplies)output signal 143 with a reference signal 149 (for example, a current orvoltage signal) to generate feedback signal 146.

As noted above, RF apparatus that use various embodiments of theinvention may operate on in-phase and quadrature inputs and/or outputs.Note that one may replicate the circuitry shown in FIGS. 2 and 3 toprovide a noise-shaping converter that accepts and processes in-phaseand quadrature signals to generate in-phase and quadrature outputsignals, as desired.

As noted above, integrating noise-shaping converters with RF circuitry(such as the receive-path circuitry of an RF receiver) may causeinterference with the operation of the converters. The interferenceresults from coupling among various blocks or circuits in an IC orpartition that includes the converters and the RF circuitry. Theinterference can cause RF signals present within the RF circuitry tocouple to the converter circuitry. The coupling of the interference mayhave undesired effects on the converter circuitry, for example, bycorrupting (or making noisy) its reference signal, its output signal, orboth.

Several interference mechanisms may exist in ICs that include togetherthe converters and the RF circuitry. FIG. 4 depicts a circuitarrangement that models one interference mechanism that result fromintegrating converters and RF circuitry together.

More specifically, the circuit arrangement in FIG. 4 includes a source175. Source 175 represents the RF signal that causes interference withthe noise-shaping converter integrated together with an RF apparatus.Source 175 may constitute a current signal (as FIG. 4 shows) or avoltage signal.

The circuit arrangement also includes a loop or inductor 178. Inductor178 represents inductance in the path of the RF signal or within thecircuit that operates on or generates the RF signal. The inductance mayhave a variety of sources, as persons of ordinary skill in the art whohave the benefit of the description of the invention understand.Examples of such inductive loops constitute the inductor in aninductor-capacitor (LC) voltage-controlled oscillator (VCO), or theinput bond wires of a low-noise amplifier (LNA). As another example,inductor 178 may represent parasitic inductance of coupling mechanisms,such as metal or semiconductor traces within an IC.

The circuit arrangement in FIG. 4 further includes loop or inductor 181.Inductor 181 represents parasitic inductance in the path of referencesignal 149 or within the circuit that operates on or generates the thatsignal (e.g., reference source 184). The parasitic inductance may have avariety of sources, as persons of ordinary skill in the art who have thebenefit of the description of the invention understand. For example,inductor 181 may represent parasitic inductance, such as metal orsemiconductor traces within an IC.

Reference source 184 generates reference signal 149. As noted above,reference signal 149 may constitute a voltage or current signal, asdesired (i.e., reference source 184 may constitute a voltage or currentsource, respectively). The noise-shaping converter (e.g., converter109A) uses reference signal 149, as described above.

Inductor 178 and inductor 181 have a mutual inductance, M. Variousfactors, such as the relative physical proximity of circuitry integratedin an IC may give rise to mutual inductance M. Mutual inductance Mcauses the flow of the RF current in inductor 178 to induce an RFcomponent in the circuit path that includes inductor 181. As a result,signal 187 (which takes into account the effect of inductor 181) nolonger matches reference signal 149. Put another way, signal 187represents a reference signal corrupted by interference from the RFsignal.

One may obtain a mathematical representation for signal 187 by using theprinciple of superposition. More specifically, one may represent signal187 as:V′ _(ref) =V _(ref)+(M/L)·i _(RF),where V′_(ref) and i_(RF) denote signal 187 and the RF current flowingthrough inductor 178, respectively.

An inspection of the above equation makes apparent that signal 187includes two components. The first component represents reference signal149 (as generated by reference source 184). The second componentaccounts for the interference that results from the magnetic couplingbetween the RF circuit and the converter circuit.

The coupling mechanism can result in degraded performance of theconverter by introducing in-band spurious tones or increased in-bandquantization noise. More specifically, the coupling causes two types ofinterference mechanism: (1) mixing or down-converting of output signal143 of the converter with the coupled RF signal, (M/L)·i_(RF); and (2)aliasing of the coupled RF signal, (M/L)·i_(RF). FIGS. 5 and 6illustrate the interference mechanisms, respectively.

FIG. 5 shows waveforms associated with the mixing or down-converting ofoutput signal 143 of the signal converter with a coupled RF signal.Waveform 200 represents the spectra of uncorrupted output signal 143 ofthe signal converter. The discrete-time spectrum of output signal 143repeats, with the sampling rate (f_(S)) separating the repeatingspectra.

Note that the spectrum of output signal 143 includes tones 203. Tones203 occur near odd multiples of half the sampling rate (f_(S)/2). Tones203 represent limit cycles, as persons of ordinary skill in the artunderstand.

Waveform 210 depicts the coupled RF signal. Waveform 210 represents thecoupled RF signal (M/L)·i_(RF) as tone 213. Because the spectra ofoutput signal 143 contain relatively large frequencies (i.e., widespectra), tone 213 falls within the range of frequencies represented inthe spectra of output signal 143.

The RF signal coupled to the reference signal of converter 109A (i.e.,(M/L)·i_(RF)) modulates or mixes in modulator 150 with output signal143. Waveform 220 represents the result of the modulation operation.Note that the modulation process causes the introduction of in-bandspurious (or noise or interference) tones 223 and results in increasedin-band quantization noise.

FIG. 6 illustrates waveforms associated with the aliasing of an RFsignal coupled to a converter circuit. Waveform 200 represents thespectra of uncorrupted output signal 143 of the signal converter. Notethat the discrete-time spectrum of output signal 143 repeats, with thesampling rate (f_(S)) separating the repeating spectra.

Similar to waveform 200 in FIG. 5, the spectrum of output signal 143 inFIG. 6 includes tones 203. Tones 203 occur near odd multiples of halfthe sampling rate (f_(S)/2), and represent limit cycles, as persons ofordinary skill in the art understand.

Waveform 210 depicts the coupled RF signal, (M/L)·i_(RF). Waveform 210represents the coupled RF signal as tone 213. Because of sampling by asampling or switching network within converter 109A (e.g., aswitched-capacitor network), the coupled RF signal may alias to in-bandtones or to a band of frequency such that it may modulate or mix without-of-band quantization noise. Waveform 250 represents the aliasedversion of the coupled RF signal, for example because of sampling of theconverter reference and performing the converter modulation with aswitched-capacitor network.

The aliased version of RF signal coupled to the reference signal ofconverter 109A, as represented by waveform 250, mixes or modulates(e.g., by a return-to-zero (RTZ) switched-current or switched-resistorfeedback circuit within feedback circuitry 134) with output signal 143.Waveform 260 represents the result of the sampled modulation or mixingoperation. The aliasing process, the modulation or mixing process, orboth, cause the introduction of in-band spurious (or noise orinterference) tones 223 or result in increased in-band quantizationnoise.

Note that a coupled RF signal with a frequency near odd multiples ofhalf the sampling rate (f_(S)/2) particularly contribute to theinterference. The coupled RF signal, or the aliased version of it,modulates or mixes with the f_(S)/2 quantization noise or with limitcycles and produced in-band errors and interference.

The inventive concepts provide methods and apparatus for eliminating orreducing interference in signals converters. To do so, one may shield(including conduits) input signal(s) (including control signal(s),reference signal(s), ground line(s), and power supply line(s)), outputsignal(s) (including status signal(s)), or both, of the converter.Furthermore, as an alternative to shielding (including conduits), or inaddition to shielding, one may filter input signal(s) (including controlsignal(s), reference signal(s), ground line(s), and power supplyline(s)), output signal(s) (including status signal(s)), or both, of theconverter. FIGS. 7 and 8 show exemplary embodiments that includeinterference reduction or elimination mechanisms.

FIG. 7 depicts a block diagram of a converter 109A according to anexemplary embodiment of the invention that includes interferencereduction or elimination apparatus. Converter 109A includes thecircuitry and blocks described above with respect to FIG. 2. Inaddition, FIG. 7 illustrates details of the circuitry used to reduce ormitigate interference.

Converter 109A in FIG. 7 shields and filters output signal 143 (asapplied to feedback circuitry 134), reference signal 149, controlsignal(s) 153, and power supply line(s) 151. More specifically, filter160A filters output signal 143, and generates filtered signal 143B.Shield (including conduits) 163A minimizes the receiving loop associatedwith signal 143B, and provides shielded signal 143A to feedbackcircuitry 134. Filter 160B filters power supply line(s) 151, andgenerates filtered signal 151B. Shield (including conduits) 163Bprovides shielding for signal 151B, and provides shielded signal 151A tofeedback circuitry 134 or, generally, to any desired part of converter109A.

Filter 160C filters control signal(s) 153, and generates filtered signal153B. Shield (including conduits) 163C provides shielding for signal153B, and provides shielded signal 153A to feedback circuitry 134 or,generally, to any desired part of converter 109A. Filter 160D filtersreference signal 149, and generates filtered signal 149B. Shield 163D(including conduits) provides shielding for signal 149B, and providesshielded signal 149A to feedback circuitry 134 (and/or other parts ofconverter 109A, as desired).

Shield (including conduits) 163E minimizes the receiving loop associatedwith signal 146A (received from feedback circuitry 134), and providesshielded signal 146B to filter 160E. Filter 160E filters signal 146B,and generates filtered signal 146. Filter 160E operates to reduce oreliminate interference that may otherwise couple into feedback circuitry134 via its output. Thus, filter 160E filters any RF interference thatmay couple back into feedback circuitry 134 via its output.

Note that one may use a similar arrangement (a filter and/or shield) toreduce interference with respect to any signal provided to, or receivedfrom, converter 109A, as desired, and as persons of ordinary skill inthe art who have the benefit of the description of the inventionunderstand. For example, one may shield and/or filter any statussignal(s) generated by feedback circuitry 134 (or any part of converter109), as desired.

FIG. 8 shows a block diagram of a converter 109A according to anotherexemplary embodiment of the invention that includes interferencereduction or elimination apparatus. Converter 109 in FIG. 8 is similarto converter 109A in FIG. 7. Converter 109A in FIG. 8, however, uses aparticular type of filter to implement filters 160A-160E.

More specifically, filters 160A-160E in FIG. 8 constitute single-poleresistor-capacitor (RC) filters. Note, however, that the filter shown inFIG. 8 constitutes merely an example, and that one may implement filtersto reduce interference in a variety of ways. The choice of filtertopology and implementation depends on factors such as design andperformance specifications and characteristics of a particularconverter, as persons of ordinary skill in the art who have the benefitof the description of the invention understand.

At least one more coupling mechanism exists that may result ininterference that degrades the performance of a signal converter orcontinuous-time feedback circuit or system. In general, the couplingmechanism affects any network or circuit that has sensitivity to jitterin a reference signal, such as a clock signal.

More particularly, an RF signal (e.g., from the RF apparatus in an ICthat includes such a converter) may cause interference by coupling tothe internal clock network of the RF apparatus, hence resulting in noisyor degraded clock signals. The clock signals typically drive variouscircuitry, such as the converter. A noisy, corrupted, or degraded clocksignal may therefore adversely impact the operation of the converter.

Note that the interfering RF signal need not originate in the IC thatincludes the converter. For example, the RF signal may originate from ananother circuit and couple to the IC through its bond wires.

FIG. 9 depicts a circuit arrangement that models the interferencemechanism that results from RF signals coupling to a reference signalsource or circuit. The circuit arrangement in FIG. 9 includes a source275. Source 275 represents the RF signal that causes interference withthe clock network or circuitry (and, hence, with the noise-shapingconverter). The RF signal may have a variety of sources, such as localoscillator (LO) circuitry. Source 275 may constitute a current signal(as FIG. 9 shows) or a voltage signal.

The circuit arrangement also includes loop or inductor 278. Inductor 278represents inductance in the path of the RF signal or within the circuitthat operates on or generates the RF signal or parasitic inductance inthe IC that includes the signal converter. The inductance may have avariety of sources, as persons of ordinary skill in the art who have thebenefit of the description of the invention understand. For example,inductor 278 may represent parasitic inductance, such as metal orsemiconductor traces of bond wires of the IC.

The circuit arrangement in FIG. 9 further includes loop or inductor 281.Inductor 281 represents parasitic inductance in the circuit or path thatincludes reference source 284. The parasitic inductance may have avariety of sources, as persons of ordinary skill in the art who have thebenefit of the description of the invention understand. For example,inductor 281 may represent parasitic inductance, such as metal orsemiconductor traces or bond wires of the IC.

Reference source 284 generates a reference signal 287. A clock signalgenerator circuit 290 uses reference signal 287 to generate a clocksignal 293. Clock signal generator circuit 290 may constitute a varietyof circuits, as desired. The choice of clock signal generator 290 andits implementation depends on factors such as design and performancespecifications and characteristics for a particular RF apparatus, aspersons of ordinary skill in the art with the benefit of the descriptionof the invention appreciate. Generally, clock signal generator 290includes a non-linear circuit or clipping circuit. By way ofillustration, clock signal generator 290 may include a limiter or aninverter, as desired.

Reference signal 287 may constitute a voltage or current signal, asdesired (i.e., reference source 284 may constitute a voltage or currentsource, respectively). Reference signal 287 may have any desiredfrequency. The frequency of reference signal 287 depends on a number offactors, such as the particular protocols or standards that the RFapparatus within which reference source 284 resides meets. For example,in one embodiment, reference signal 287 may have a frequency of 13 MHz.In another illustrative embodiment, reference signal 287 may have afrequency of 26 MHz.

Inductor 278 and inductor 281 have a mutual inductance, M′. Mutualinductance M′ may exist because of various causes, such as the proximityof the circuits integrated in an IC. Mutual inductance M′ causes theflow of the RF current in inductor 278 to induce an RF component in thecircuit path that includes inductor 281. As a result, signal 296 (whichtakes into account the effect of inductor 281) fails to match referencesignal 287. Put another way, signal 296 represents a reference signalcorrupted by interference from the RF signal.

One may obtain a mathematical representation for signal 296 by using theprinciple of superposition. More specifically, one may represent signal296 as:V′=V+(M′/L)·i _(RF),where V′, V, and i_(RF) denote reference signal 296, signal 287 and theRF current flowing through inductor 278, respectively.

One may determine from an inspection of the above equation that signal296 includes two components. The first component represents referencesignal 287 (as generated by reference source 284). The second componentaccounts for the interference that results from the magnetic couplingbetween the RF circuit and the circuit that includes reference source284.

FIG. 10 shows waveforms associated with interference that results fromcoupling between an RF signal and a reference or clock generationcircuit. Waveform 300 represents the spectra of reference signal 287.The spectra has components at N·f_(ref), where N and f_(ref) denote aninteger number and the frequency of reference signal 287, respectively.(Note that the tone at frequency f_(ref) alone may cause interference.)

Waveform 310 depicts the coupled RF signal (e.g., an LO signal).Waveform 210 represents the coupled RF signal as tone 313. Tone 313 mayoccur at a frequency of N·f_(ref)±Δf, where Δf represents a frequencydifference.

Clock signal generator circuit 290 limits or “squares up” the referenceclock, and folds or aliases the coupled RF signal (as represented bytone 313). The folding or aliasing causes jitter in clock signal 293.Waveform 320 represents the result of the folding or aliasing operation.(Note that, for the sake of clarity of presentation, waveform 320 showsonly one component of the resulting signal.)

The spectra in waveform 320 include a tone 323 at frequency f_(ref) andside tone 326 and side tone 329 at frequencies f_(ref)−Δf andf_(ref)+Δf, respectively. Side tone 326 and side tone 329 representjitter in clock signal 293. The jitter in clock signal 293 in turncauses degradation of the performance of the converter, as persons ofordinary skill in the art who have the benefit of the description of theinvention understand.

One may reduce or eliminate the interference from the coupled RF signaland the resulting clock jitter by filtering signal 296 (see FIG. 9)and/or shielding (including conduits) it. Doing so removes or tends toreduce the RF component in the signal supplied to the input of clocksignal generator 290.

FIG. 11 illustrates a block diagram of a circuit arrangement forgenerating clock signals according to an exemplary embodiment of theinvention. Filter 350 filters reference signal 287 and generatesfiltered signal 353. One may shield (including conduits) filtered signal353, by using shield or conduit 163, as desired. Filtered signal 353couples to the input of clock signal generator 290. Because of thefiltering operation of filter 350, clock signal 293 has no jitter or hasreduced jitter.

Note that one may use a variety of circuits to implement filter 350 inorder to reduce or eliminate interference. The choice of the topologyand implementation of filter 350 depends on factors such as design andperformance specifications and characteristics of a particular desiredconverter or apparatus, as persons of ordinary skill in the art who havethe benefit of the description of the invention understand.

Furthermore, one may use a variety of shields (including conduits) toimplement shield (including conduits) 163 in order to reduce oreliminate interference. The choice of the topology and implementation ofshield 163 depends on factors such as design and performancespecifications and characteristics of a particular desired converter orapparatus, as persons of ordinary skill in the art who have the benefitof the description of the invention understand.

FIG. 12 depicts a block diagram of a circuit arrangement for generatingclock signals according to another exemplary embodiment of theinvention. The circuit arrangement in FIG. 12 is similar to the circuitarrangement in FIG. 11. The circuit arrangement in FIG. 12, however,uses a particular type of filter to implement filter 350. Morespecifically, filter 350 in FIG. 12 constitutes a single-poleresistor-capacitor (RC) filter.

An aspect of the invention relates to shielding (including conduits)signals to reduce interference. FIGS. 13-20 illustrate severaltechniques according to the invention to shield signals and circuit orIC elements by routing signal conductors or coupling mechanisms throughconduits. Note that one may use the techniques to reduce loop area orcontain, reduce, or eliminate currents in either transmitting orinterfering circuits or in receiving circuits (circuits affected by theinterference from the transmitting or interfering circuits).

FIG. 13 is a schematic diagram of two similar circuit elements 640 and642 connected together by a signal line 644. The technique of thepresent invention uses a conductive strip 648 connected at one end 650to ground (i.e., a reference voltage). The opposite end 652 of theconductive strip 648 is not connected to ground. As a result, theconductive strip 648 acts as a shield to the signal line 644 andprovides a return path for high frequency components of the currentwhich flows along the signal line 644.

The strip 648 increases the route capacitance, but manages the returnpath. As a result of the strip 648, the signal line 644 is no longercapacitively coupled to the ground return 646, but is capacitivelycoupled to the conductive strip 648. FIG. 13 shows a current loop 645which flows through the route capacitance formed between the signal line644 and strip 648. In other words, the loop area of the presentinvention (FIG. 13) includes the area between the signal line 644 andthe conductive strip 648 (rather than the area between the signal line544 and the ground return 546 in conventional solutions).

It can be seen that the loop area is greatly reduced by the conductivestrip 648. Note that the conductive strip 648 is most effective with theend 652 not connected to anything since if it were otherwise connected,some of the current could flow back through the ground return 646.

FIGS. 14-20 illustrate many implementations of the conductive stripshown in FIG. 13 in an IC having a substrate and three metal layers.FIG. 14 is a sectional end view illustrating a silicon substrate 746 andthree conductive or metal layers (METAL 1, METAL 2, METAL 3) of an IC. Asignal line 744 is formed in the METAL 2 layer. A first conductive strip754 is formed on the METAL 1 layer directly below the signal line 744.

A second conductive strip 756 is formed on the METAL 3 layer directlyabove the signal line 744. Finally, conductive strips 758 are formed inthe METAL 2 layer on each side of the signal line 744. The conductivestrips 754, 756, and 758 are connected to each other by vias 760 and aregrounded at one end (like conductive strip 648 is grounded at end 650).

The opposite ends of the conductive strips 754, 756, and 758 are notconnected to anything. As shown, the conductive strips 754, 756, and 758surround the signal line 744 forming a conduit which shields the signalline 744 much like a coaxial cable is shielded. As mentioned above, thecurrent loop area is greatly reduced by the conduit, reducing the mutualinductance of the loop to any other loop on the IC.

FIG. 15 is a sectional side view taken along line 10-10 of FIG. 14. FIG.15 helps to illustrate how the conductive strips are connected or not ateach end. FIG. 15 shows the conductive strips 754 and 756 connected toground (the substrate 746) by contact 761 at one end 750. As shown, theopposite ends 752 are not connected to ground. The signal line 744 isshown extending past the ends 752 where it will be 25 connected to acircuit component such as component 642 (FIG. 13).

FIGS. 16-20 illustrate alternate forms of the conduits of the presentinvention. FIG. 16 is a sectional end view similar to FIG. 14. However,the conduit shown in FIG. 16 includes two rows of vias 960 connectingthe conductive strips 954, 956, and 958. The embodiment shown in FIG. 16more completely shields the signal line 944.

FIG. 17 is a top sectional view taken along line 12-12 in FIG. 16showing the signal line 944 and the conductive strips 958. FIG. 17 alsoshows the layout of the vias 960. As shown, the vias 960 are arranged inseparate staggered rows forming a “fence” or checkerboard type ofpattern. This layout of vias 960 provides more shielding in the gapsbetween the conductive strips. Note that vias could be staggered inother ways.

FIG. 18 shows an embodiment with only one conductive strip 1154positioned between the signal line 1144 and the substrate 1146. Theconductive strip 1154 is the same as the conductive strip 754 shown inFIG. 14, but without vias or other conductive strips. FIG. 19 shows anembodiment that provides better shielding than the embodiment shown inFIG. 18.

The embodiment shown in FIG. 19 allows a signal to be routed in theMETAL 3 layer, while providing shielding of the signal line 1244 by thecombination of conductive strips 1254, 1258, and vias 1260. FIG. 20shows an embodiment with two conductive strips 1358 positioned onopposite sides of the signal line 1344.

The conductive strips 1358 are the same as the conductive strips 758shown in FIG. 14, but without vias connected to other conductive strips.The embodiments shown in FIGS. 18-20 will help to shield the signallines 1144, 1244, and 1344 but not as thoroughly as the embodiment shownin FIGS. 14-16. It can be seen that many different combinations ofconductive strips and metal layers may be used to implement the conduitsof the present invention.

One may apply shielding techniques, such as the techniques describedabove, to various parts or components (e.g., resistors, capacitors, andinductors) of the interference reduction filters, as desired. Forexample, consider the situation where the filter constitutes an RCfilter (see, for instance, filter 350 in FIG. 12). One may shield theplate(s) of the capacitor C, as desired. In addition (or as analternative), one may shield the implant or diffusion area (or otherregion, such as polysilicon) that implements or realizes the resistor R,as desired. One may apply similar techniques to inductors, as desired.

Note that one may implement shields to reduce interference according tothe invention in a variety of ways (such as the techniques describedabove). The choice of the shielding mechanism and its implementationdepends on factors such as design and performance specifications andcharacteristics of a particular converter, as persons of ordinary skillin the art who have the benefit of the description of the inventionunderstand.

Persons of ordinary skill in the art who have the benefit of thedescription of the invention appreciate that the inventive concepts areflexible and lend themselves to a variety of implementations and designchoices. For example, one may apply the inventive interference reductionor elimination techniques to some, but not necessarily all, signals orcomponents related to a converter or non-linear block, as desired. Asanother example, one may switch the order or position of the filter andshield (e.g., a shield followed by a filter, rather than a filterfollowed by a shield), as desired.

Referring to the figures, the various blocks shown depict mainly theconceptual functions and signal flow. The actual circuit implementationmay or may not contain separately identifiable hardware for the variousfunctional blocks. For example, one may combine the functionality ofvarious blocks into one circuit block, as desired. Furthermore, one mayrealize the functionality of a single block in several circuit blocks,as desired. The choice of circuit implementation depends on variousfactors, such as particular design and performance specifications for agiven implementation, as persons of ordinary skill in the art who havethe benefit of the description of the invention understand.

Other modifications and alternative embodiments of the invention inaddition to those described here will be apparent to persons of ordinaryskill in the art who have the benefit of the description of theinvention. Accordingly, this description teaches those skilled in theart the manner of carrying out the invention and are to be construed asillustrative only. As persons of ordinary skill in the art with thebenefit of the description of the invention understand, one may makemany modifications to the circuit arrangements described here and shownin the accompanying figures, as desired, without departing from theinventive concepts.

For example, one may use fewer, more, or different signals, signallinks, conductors, and the like in the interfaces, as desired. Asanother example, one may modify and generalize the circuitry andconcepts to accommodate other sizes of the various variables, such asinput sizes, output sizes, number of inputs, outputs, and signals, andthe like. By modifying the circuit arrangements shown, one may usedesired buses, bus interface mechanisms and circuitry, IP blocks, logiccircuitry, and the like. The modifications depend on the design andperformance specifications for a particular implementation and, asnoted, fall within the knowledge of persons skilled in the art who havethe benefit of the description of the invention.

Furthermore, persons skilled in the art may make various changes in theshape, size and arrangement of parts without departing from the scope ofthe invention described in this document. For example, persons skilledin the art may substitute equivalent elements for the elementsillustrated and described here. Moreover, persons skilled in the art whohave the benefit of this description of the invention may use certainfeatures of the invention independently of the use of other features,without departing from the scope of the invention.

We claim:
 1. An apparatus, comprising an integrated circuit (IC) adaptedfor operating on radio frequency (RF) signals, the integrated circuit(IC) comprising baseband circuitry to process an RF signal and generatean output signal; and noise-shaping converter to process the outputsignal, wherein an input and/or an output of the noise-shaping converteris shielded to reduce interference resulting from inductive coupling orRF signal coupling.
 2. The apparatus of claim 1, wherein a referencesignal input of the noise-shaping converter is shielded.
 3. Theapparatus of claim 1, wherein a power supply input of the noise-shapingconverter is shielded.
 4. The apparatus of claim 1, wherein thenoise-shaping converter comprises a delta-sigma converter; a deltamodulator; a single-loop converter; a multiple-loop converter; amulti-stage noise-shaping circuitry (MASH); a converter with asingle-bit feedback path or circuitry; or a converter with a multi-bitfeedback path or circuitry.
 5. The apparatus of claim 1, wherein thenoise-shaping converter operates on an in-phase signal.
 6. The apparatusof claim 5, further comprising an additional noise-shaping converter,wherein the additional noise-shaping converter operates on a quadraturesignal.
 7. The apparatus of claim 1, wherein the interference resultsfrom inductive coupling between a first inductor and a second inductor.8. The apparatus of claim 7, wherein the first inductor comprisesinductance used in a voltage-controlled oscillator (VCO).
 9. Theapparatus of claim 7, wherein the first inductor comprises inductancefrom a bond wire of the integrated circuit (IC).
 10. The apparatus ofclaim 7, wherein the first inductor comprises parasitic inductance. 11.The apparatus of claim 7, wherein the second inductor comprisesparasitic inductance in a path of a reference signal coupled to thenoise-shaping converter.
 12. The apparatus of claim 1, wherein theinterference results from RF signal coupling to an internal clockcircuit of the integrated circuit (IC).
 13. The apparatus of claim 12,wherein an internal clock signal of the integrated circuit (IC) isfiltered to generate a filtered clock signal.
 14. The apparatus of claim13, wherein the filtered clock signal is shielded.
 15. An apparatus,comprising an integrated circuit (IC) adapted for operating on radiofrequency (RF) signals, the integrated circuit (IC) comprising anamplifier coupled to provide an amplified signal, and a noise-shapingconverter adapted to process a signal derived from the amplified signal,wherein an input and/or an output of the noise-shaping converter isshielded to reduce interference in the integrated circuit (IC).
 16. Theapparatus according to claim 15, wherein the noise-shaping convertercomprises a subtracter, a signal-processing circuit, a quantizer, and amodulator.
 17. The apparatus according to claim 15, wherein thenoise-shaping converter comprises a subtracter, a signal-processingcircuit, a quantizer, and a feedback circuit.
 18. An apparatus,comprising an integrated circuit (IC) adapted for operating on radiofrequency (RF) signals, the integrated circuit (IC) comprisingintermediate frequency (IF) circuitry to process an RF signal andgenerate an output signal; and noise-shaping converter to process theoutput signal, wherein an input and/or an output of the noise-shapingconverter is filtered to reduce interference resulting from inductivecoupling or RF signal coupling.
 19. The apparatus according to claim 18,wherein an input and/or an output of the noise-shaping converter isshielded to reduce interference.
 20. The apparatus according to claim18, wherein the noise-shaping converter comprises feedback circuitrycoupled to the output of the noise-shaping converter.